`ifndef FULLADDR_V
`define FULLADDR_V

`include "HalfAddr.v"

module FullAddr(input a, b, cin, output sum, cout);
    wire sum1, carry1, carry2;
    HalfAddr halfAddr1(a, b, sum1, carry1);
    HalfAddr halfAddr2(sum1, cin, sum, carry2);
    Or or1(carry1, carry2, cout);
endmodule
`endif